AT89C5131A-UM

AT89C5131A-UM is a high performance flash version of the 80C51 single-chip 8 bit micro-controllers with full speed usb functions.

AT89C5131 features a full speed usb module compatible with the usb specifications version 1.1 important to realize and 2.0. This module integrates the usb transceivers in contrast with a 3.3V voltage regulator and the serial interface engilne (SIE) with digital phase locked loop and 48 Mhz clock recovery. USB event detection logic(Reset and suspend/resume) and FIFO buffers supporting the mandatory control endpoint(EPO) and up to 6 versatile endpoints(EP1/EP2/EP3/EP4/EP5/EP6) with minimum software overhead are also part of the USB module.

AT89C5131 retains the features of the ATMEL 80C52 with extended flash capacity (32-Kbyte), whereas 256 bytes of internal RAM, a 4 level interrupt system, two 16 bit timer/counters(T0/T1), a full duplex enhanced UART(EUART) and in sum an on-chip oscillator. In addition AT89C5131 has an on-chip expanded RAM of 1024 bytes(ERAM) a dual-data pointer, a 16 bit up/down Timer(T2),a programmable counter array(PCA),up to 4 programmable LED current sources, a programmable hardware watchdog and a power-on reset.

It has two software-selectable modes of reduced activity for further reduction in power consumption. In the idle mode the CPU is frozen while the timers, the serial ports and the interrupt system are still operating. In the power-down mode the RAM is saved, the peripheral clock is frozen, but the device has wake-up capability through USB events or external interrupts.

Features of AT89C5131A-UM

• 80C52X2 Core (6 Clocks per Instruction)
– Maximum Core Frequency generally 48 MHz in X1 Mode, 24MHz in X2 Mode
– Dual Data Pointer
– Full-duplex Enhanced UART (EUART)
– Three 16-bit Timer/Counters: T0, T1 and T2
– 256 Bytes of Scratchpad RAM
– Endpoint 0 for Control Transfers: 32-byte FIFO
– 6 Programmable Endpoints with In or Out Directions and with Bulk, Interrupt or
Isochronous Transfers
– Suspend/Resume Interrupts
– Power-on Reset and USB Bus Reset
– 48 MHz DPLL for Full-speed Bus Operation
– USB Bus Disconnection on Microcontroller Request
• 5 Channels Programmable Counter Array (PCA) with 16-bit Counter, High-speed
Output, Compare/Capture, PWM and Watchdog Timer Capabilities
• Programmable Hardware Watchdog Timer (One-time Enabled with Reset-out): 50 ms to
6s at 4 MHz.

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